1. Field of the Invention
The invention relates generally to semiconductor structures and methods of fabricating the same. More particularly, the invention relates to field effect transistors (FETs) including silicided gates and methods of fabricating the same.
2. Description of the Related Art
A recent trend in field effect transistor technology has been the replacement of polysilicon gates with alternative gate materials that are not susceptible to a charge carrier depletion effect. A charge carrier depletion effect results when a polysilicon gate is energized and charge carriers are depleted at the polysilicon gate to gate dielectric interface. Charge carrier depletion effects can often significantly compromise field effect transistor operating characteristics, since charge carrier depletion effects provide for a greater effective gate dielectric thickness than an actual gate dielectric thickness.
Alternatives to polysilicon gate materials are typically metal gate materials or silicide gate materials. Neither metal gate materials, nor silicide gate materials, are susceptible to a charge carrier depletion effect. Therefore, both are promising candidates to replace polysilicon gate materials.
There are existing methods for fabricating fully silicided gates. For example, Xiang et al., in U.S. Pat. No. 6,562,718, teaches a method for forming a silicide gate within a field effect transistor. This prior art method forms the silicidization of silicided source/drain regions first, and following that uses a blocking layer to avoid additional silicidization of silicided source/drain regions when forming a fully silicided gate. In addition, Amos et al., in U.S. Pub. No. 2005/0106788 teaches a method for fabricating multiple threshold metal gates within CMOS structures. This prior art method uses different silicide materials to provide the multiple threshold metal gates.
Since a trend for decreased dimensions of field effect transistors is certain to continue, and since silicide gate field effect transistors (i.e., fully silicided gate field effect transistors) provide enhanced performance, additional silicide gate field effect transistor structures and methods for fabrication thereof are desirable.